The present invention relates to a technique for manufacturing a semiconductor integrated circuit device. The invention particularly relates to a technique effective for application to a CSP (chip size package) that is electrically connected via a metal wire between a bump electrode disposed on a chip and an electrode part before rearrangement.
Along with reduction in electric and electronic apparatuses in size, the reduction of semiconductor integrated circuit devices used in the apparatuses for them have also been progressed in both size and thickness. The CSP means a general name of a package having a size equivalent to or slightly larger than the size of a semiconductor chip, and this CSP has been practically used as a package capable of realizing the reduction in sizes and thickness.
A metal wire is used to connect this CSP, a gap between an electrode part before rearrangement (for example, a part called a bonding pad), being a part of top-layer wires arranged in a semiconductor chip and a bump electrode being an external connection terminal.
There are following methods for performing the above-mentioned connection, for example. A passivation film and a polyimide film on the top-layer wires are selectively removed by etching, and thereby exposing the electrode part before rearrangement. Thereafter, a copper (Cu) film is deposited by a sputtering method on the passivation film and the electrode part before rearrangement to perform a pattering. By this method, a copper wire is formed to extend from the electrode part before rearrangement to a bump electrode formation area. A method like this is disclosed in, for example, Japanese Patent Laid-open No. 8-340002.
There is also a method of forming a wire-shaped projection extending from the electrode part before rearrangement to the bump electrode formation area by a bonding machine. Such a method is disclosed in, for example, U.S. Pat. No. 5,476,211.
Meanwhile, as a technique for encapsulating a semiconductor chip, there has been investigated a technique of forming an encapsulation layer by using photocurable components for curing the resin with optical energy. According to this technique, after forming an encapsulation layer using the photocurable components, a solder paste is charged therein. Then, a solder bump is formed on this paste. This technique is disclosed in, for example, Japanese Patent Laid-open No. 8-293509.
However, in the above-described methods, it is difficult to develop materials as sputtering durability is required in forming copper wires on a polyimide film that is used as a stress relaxation layer. Further, it is difficult to reduce cost of manufacturing the copper wires as the manufacture includes many processes.
On the other hand, in the case of forming the wire-shaped projection by using the bonding machine, there is a limit to respective pitches between terminals because the terminals are formed mechanically. Further, a short circuit occurs easily between the terminals as the terminals are exposed outside.
Further, in the above method using the photocurable components, both metal wiring part (solder paste part) and encapsulation layer seem to have insufficient stress relaxing force.
An object of the present invention is to provide a method of manufacturing a semiconductor integrated circuit device having a stress relaxing force and being capable of forming both a metal wiring part and a guide layer in a relatively simple process and in high precision by utilizing a photocurable resin. The guide layer also works as a protection film for protecting a metal wire.
The above object and new features of the present invention will become apparent from description of the present specification and the appended drawings.
Among the aspects disclosed in the present invention, some representative aspects are briefly explained as follows.
(1) According to a method of manufacturing a semiconductor integrated circuit device of the present invention, a photocurable resin layer is formed on an insulation film and an electrode part before rearrangement on a semiconductor substrate. A laser beam is irradiated onto a periphery of a metal wiring formation scheduled area that extends from the electrode part before rearrangement to a bump electrode contact area. By scanning, the photocurable resin is cured, and a guide layer is formed. Then, a metal wire is formed by plating in a hollow-shaped part along this guide layer.
(2) A metal wire may be formed by forming a metal seed layer for electroplating on the electrode part before rearrangement and by performing electroplating.
(3) An aperture larger than the bump electrode contact area may be formed in the guide layer.
(4) And an induction hole may be formed in a part of a lower area of the guide layer.
(5) Further, according to a method of manufacturing a semiconductor integrated circuit device of the present invention, a photocurable resin layer is formed on an insulation film and an electrode part before rearrangement on a semiconductor substrate. A laser beam is irradiated onto metal wiring formation scheduled area that extends from the electrode part before rearrangement to a bump electrode contact area. By scanning, the photocurable resin is cured. Then, a surface of this cured resin is plated, thereby forming a metal wire.
(6) Further, according to a method of manufacturing a semiconductor integrated circuit device of the present invention, a photocurable resin layer is formed on a packaging substrate on which a chip having a semiconductor integrated circuit is mounted. Then, a laser beam is irradiated onto this layer, and by scanning, an optical waveguide, a signal path like a high-frequency transmission path, or a passage for a liquid substance is formed.
(7) A semiconductor integrated circuit device of the present invention has a metal wire that extends from an electrode part before rearrangement to a bump electrode contact area, and a protection layer that is formed around the metal wire by curing a photocurable resin.
(8) A semiconductor integrated circuit device of the present invention has a cured resin part that extends from an electrode part before rearrangement to a bump electrode contact area and that is formed by curing a photocurable resin, and a metal wiring part formed around the cured resin part.
(9) A semiconductor integrated circuit device of the present invention has a packaging substrate on which a chip having a semiconductor integrated circuit is mounted, and an optical waveguide, a signal path like a high-frequency transmission path, or a passage for a liquid substance made of a cured resin part that is formed by curing a photocurable resin.
According to the above means, a photocurable resin is utilized, and the resin near the metal wiring formation area that extends from the electrode part before rearrangement to the bump electrode is cured, thereby forming a metal wiring guide layer and a protection film. The metal wire is formed, thereafter. Therefore, it is possible to form this metal wiring part and the metal wiring guide layer that also works as a protection film, in a relatively simple process and with high precision.
Further, as the metal wire covered by the guide layer and protection film, it is possible to relax the external stress to the metal wire.